Three Dimensional (3D) n-gate MOSFET

The concept of a three-dimensional (3D) n-gate MOSFET device SOI substrate has been proposed and developed in this work. This device consists of a rounded surface channel with gate extensions into the buried oxide for improved subthreshold behavior. The fabrication steps are compatible with the bulk CMOS process and it requires a mere addition of a reactive ion etching (RIE) etch step. Hence, the proposed n-gate transistor can be a viable replacement for bulk transistor in the near future.