Improving the Component Level Reliability of a Flip-Chip Ball-Grid-Array (FCBGA) Package using Numerical Modeling Method

As silicon device grows in size and complexity, packaging of these devices also becomes more and more challenging. This is particularly true for flip-chip Ball-Grid-Array (FCBGA) packages where severe stress due to the CTE mismatch between the silicon device, organic substrate, and. in some applications. Cu heat-spreader have to be mitigated with appropriate applications of underfill and, to a lesser extent, thermal interface materials (TIMs). An investigation of a FCBGA package that failed component-level reliability test and methods to improve its performance with modeling and experiment methods will be presented. Qualification tests and characteristic failure will be first described. Failure analysis indicated that delamination took place at the interface between the die and underfill. Subsequent crack propagation broke the interconnection of the flip-chip solder joints. Several modified designs to help reduce the stresses in the underfill as well as in the overall package were considered. A finite-element analysis (FEA) was concurrently initiated to explore the impact of the different designs that included different attachment methods, removal of the existing lid. and application of alternative materials: trade-offs were studied and modeling as well as experiment methods were used to help optimize the solutions. As a result, a new design was proposed that aimed to achieve a balance between die protection, system level thermal interface and stress mitigation. The improvement of the design is confirmed with modeling analysis and subsequent test results.