Characterization and modeling of diodes in Sub-45 nm CMOS technologies under HBM stress conditions

Diodes in a sub-45 nm CMOS technology, bulk and FinFET, are both investigated for their behavior under real-time ESD conditions. A new compact ESD diode model is developed and validated for HBM ESD transients. Forward recovery behavior during both TLP and HBM ESD stress is observed for FinFET diodes.