A 1/2.7-in 2.96 MPixel CMOS Image Sensor With Double CDS Architecture for Full High-Definition Camcorders

A 1/2.7-in 1944 times 1484 pixel CMOS image sensor with double CDS architecture fabricated in a 0.18-mum single-poly triple-metal (1P3M) CMOS process is described. It operates at 48 MHz in a progressive scanning mode at 60 frames/s for full high-definition (HD) imaging. Two transistors/pixel architecture and low optical stack with double microlenses achieve 14.6 ke macr/1times ldr s sensitivity and 14 ke macr saturation. Double CDS architecture with a high-gain column amplifier realized a low noise floor of 3.5 e macr
_rms
. Optimized shallow-trench isolation achieved very low dark current of 12.2 e macr/s (60degC). This image sensor also realizes low power consumption of 220 mW.