Hybrid CMOS/Nanodevice Circuits: Architectures, Applications, and Device Needs

Recent work on devices, circuits and architectures for possible hybrid semiconductor/nanodevice integrated circuits is reviewed, especially those based on nanowire crossbars, with similar, simple, two-terminal devices formed at each crosspoint. A rotation of the nanowire crossbar by a certain, well-defined angle with respect to the interface pin grid allows the CMOS subsystem to address each and every of the crosspoint devices, even with no nanoscale alignment between the CMOS and crossbar subsystems. This feature liberates the high-resolution patterning technologies from the burden of overlay requirements and may enable their fast scaling beyond the 10-nm frontier. However, these and other demonstrated devices with similar functionality can hardly be scaled below 10 nm.