Reduction of Reset Current in NiO-ReRAM Brought about by Ideal Current Limiter

In this paper, we fabricated 1T1R NiO-ReRAM test circuits based on 0.18 mum CMOS technology and observed notable suppression of I
_reset
by imposing current compliance I
_comp
using a cell transistor. Reducing the stray capacitance between Pt/NiO/Pt and the cell transistor used as a current limiter is crucial in this issue. This enabled the systematic measurement of I
_comp
dependence of l
_reset
for I
_comp
< 1 mA and I
_reset
ap I
_comp
was observed for 150 muA les I
_comp
les950 muA.