Task Graph Generation

There are many intelligent design tools available, which are being used at the highest level of abstraction. These tools are very effective in solving the hardware/software co-synthesis problems. These tools require the input specification of the problem to be in the form of one or more task graph. Currently, one major problem is that many real time embedded system designs are specified in high level programming languages, not task graphs. The designer can manually transform the input specification from the used computer language to a task graph form, but this job has tedious and error prone problems. The task graph generation described in this paper reduces the potential for error and time required by automating the task graph process