Design of Ultra-Low-Voltage RF Frontends With Complementary Current-Reused Architectures

In this paper, ultra-low-voltage circuit techniques are presented for CMOS RF frontends. By employing a complementary current-reused architecture, the RF building blocks including a low-noise amplifier (LNA) and a single-balanced down-conversion mixer can operate at a reduced supply voltage with microwatt power consumption while maintaining reasonable circuit performance at multigigahertz frequencies. Based on the MOSFET model in moderate and weak inversion, theoretical analysis and design considerations of the proposed circuit techniques are described in detail. Using a standard 0.18-mum CMOS process, prototype frontend circuits are implemented at the 5-GHz frequency band for demonstration. From the measurement results, the fully integrated LNA exhibits a gain of 9.2 dB and a noise figure of 4.5 dB at 5 GHz, while the mixer has a conversion gain of 3.2 dB and an IIP
₃
of -8 dBm. Operated at a supply voltage of 0.6 V, the power consumptions of the LNA and the mixer are 900 and 792 muW, respectively.