Design and Implementation of Routing Scheme for Wireless Network-on-Chip

Modern embedded SoC design uses a rapidly increasing number of processing units for ubiquitous computing. When moving towards a billion-transistor era, ever increasing complexity, density and heterogeneity of embedded components exacerbate on-chip communication, which serves as the fabric to integrate these components and provide a communication mechanism among them. In order to bridge the widening gap between computation requirements and communication efficiency, we develop a new on-chip communication system, dubbed Wireless Network-on-Chip (WNoC), by using the RoC technology. In this paper, we mainly focus on the design and hardware implementation of a region-aided routing scheme that realizes loop-free, minimum path cost and high scalability for irregular WNoC infrastructure.