Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip

This paper proposes an approach to accelerate elliptic curve cryptography (ECC) algorithm on system-on-programmable-chip (SOPC). We firstly analyzed the software efficiency of field multiplication and field division over GF(2
^m
) on Nios II processor. Hardware acceleration for both field multiplication and division is investigated. The designs are integrated and verified with Nios II processor. The experimental results showed that accelerators improve the performance of ECC considerably with the cost of more areas.