A 0.12μm CMOS Comparator Requiring 0.5V at 600MHz and 1.5V at 6GHz

This comparator has 2 active-load PMOS transistors that can be used to reset the output nodes to the supply level. An NMOS transistor added in the clock line controls the active loads to avoid additional reset switches and continuously biased load transistors. Two NMOSTs added in the input differential amplifier reduce the power consumption, which is 18μW at 0.5V and 600MHz, and 2.65mW at 1.5V and 6GHz