A 60 $\mu$W High Linearity CMOS Peak-Stretcher/Discriminator

We present a pulse peak-stretcher/discriminator designed for applications where the constraints on power consumption and linearity are stringent. The circuit, realized in 0.35 mum CMOS technology, has almost two decades input signal range with a linearity error within - 0.08/ + 0.04%, measured at 33.6 mus peaking time. The circuit is supplied with a single voltage of 3.3 V with a total power consumption of 60 muW with a layout area of 125 mum x 65 mum.