Very High Carrier Mobility for High-Performance CMOS on a Si(110) Surface

In this paper, we demonstrate CMOS characteristics on a Si(110) surface using surface flattening processes and radical oxidation. A Si(110) surface is easily roughened by OH
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ions in the cleaning solution compared with a Si(100) surface. A flat Si(110) surface is realized by the combination of flattening processes, which include a high-temperature wet oxidation, a radical oxidation, and a five-step room-temperature cleaning as a pregate-oxidation cleaning, which does not employ an alkali solution. On the flat surface, the current drivability of a p-channel MOSFET on a Si(110) surface is three times larger than that on a Si(100) surface, and the current drivability of an n-channel MOSFET on a Si(100) surface can be improved compared with that without the flattening processes and alkali-free cleaning. The 1/f noise of the n-channel MOSFET and p-channel MOSFET on a flattened Si(110) surface is one order of magnitude less than that of a conventional n-channel MOSFET on a Si(100) surface. Thus, a high-speed and low-flicker-noise p-channel MOSFET can be realized on a flat Si(110) surface. Furthermore, a CMOS implementation in which the current drivabilities of the p-channel and n-channel MOSFETs are balanced can be realized (balanced CMOS). These advantages are very useful in analog/digital mixed-signal circuits.