Cointegration of High-Performance Tied-Gate Three-Terminal FinFETs and Variable Threshold-Voltage Independent-Gate Four-Terminal FinFETs With Asymmetric Gate-Oxide Thicknesses

Cointegration of titanium nitride (TiN)-gate high-performance tied-gate three-terminal FinFETs with symmetric gate-oxide thicknesses $(t_{{\rm ox}1} = t_{{\rm ox}2} = \hbox{1.7}\ \hbox{nm})$ and variable threshold-voltage $V_{\rm th}$ independent-gate four-terminal (4T) FinFETs with asymmetric gate-oxide thicknesses ( $t_{{\rm ox}1} = \hbox{1.7}\ \hbox{nm}$ for the driving-gate-oxide, and $t_{{\rm ox}2} = \hbox{3.4}\ \hbox{or}\ \hbox{7.0}\ \hbox{nm}$ for the control-gate-oxide) has been successfully developed using conventional reactive sputtering, two-step Si-fin and gate-oxide formation, and resist etch-back processes. A significantly improved subthreshold slope and an extremely low OFF-state current $I_{ \rm off}$ are experimentally confirmed in the asymmetric gate-oxide thickness 4T FinFETs by increasing the control-gate-oxide thickness to twice or more the driving-gate-oxide thickness. The developed techniques are attractive for high-performance and low-power FinFET very large-scale integration circuits.