A new method for Test and Design Multistage Power Amplifiers using Load Pull data

We propose a multistage power amplifier design method based on nonlinear load pull testing and contouring of power transistors. The new technique only requires load pull and S-parameter testing capability, which can be launched from the design program itself. A scaling feature allows the determination of the best test conditions for devices to be used in multiple stage circuits. Load Pull data are measured for swept input power in order to allow interstage power matching, which then happens automatically. The output power generated by the first stage of the two-stage amplifiers serves to identify the input power level for the second stage data, which are already part of the measurement. No knowledge of the transistor's nonlinear behavior, except for load pull data, is required for accurate amplifier design. Harmonic load information can be added and considered in the design. Test data for the design include load pull contours of Output Power, Efficiency, Intermod, ACPR (CDMA) etc. measured for full input power sweeps over the entire load impedance range. The universality of data that can be used for design proves the utility and advantage of the method compared to nonlinear modeling. In the process of network optimization the actual driver stage output power is computed and used as its input power for the second stage which then generates the overall output power contours. Because the technique only uses measured data and interpolation routines, it is very fast. 1000 circuit optimizations are carried through in less than 2-5 seconds.