A GF(24m) Inverter and its Application in a Reconfigurable Tate Pairing Processor

This paper details an architecture for performing inversion in the field GF(2
^4m
), which is the field used in computing the Tate pairing on characteristic 2 supersingular elliptic curves. The inverter architecture is then used to improve the performance of a reconfigurable Tate pairing hardware accelerator. Implementation results for the improved processor on an FPGA are presented and compared to those of the basic processor without the inverter