Analog cellular neural network with application to partial differential equations with variable mesh-size

A design of VLSI analog CMOS circuit for solving partial differential equations (PDE) has been presented. Elliptic PDE with constant coefficients were considered. A numerical method of discretizing the differential equations on n by n mesh is applied. The partial derivatives are approximated by the difference quotients. When these are substituted back into differential equation, a linear system of algebraic equations is obtained. The n/sup 2/ unknowns of this system are the solutions of the discretized differential equation at the mesh points. The resultant coefficient matrix of this linear system of equations is positive definite. A neural network approach is used. Due to a very regular structure and sparsity of the coefficient matrix, the electrical circuit of the neural network results in a cellular structure which is very suitable for the VLSI analog CMOS implementation. In solving PDE by the use of finite-difference approximations an inherent error due to the discretization technique exists, Intuitively, the accuracy of any finite-difference solution could be increased by decreasing the mesh size. However, the nature of the very solution of the PDE has also an effect upon the inherent accuracy of a finite-difference approximation. Therefore, in selecting an appropriate mesh size, the nature of the function that constitutes the solution of PDE must be taken into consideration. In this paper we will consider how, within the limited size of the neural network, the accuracy of the introduced method can be improved by using a variable mesh size.<
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