A New Fast Controller for Digital Signal Processing (DSP) ICS

This paper outlines the architecture of a universal controller for DSP-chips. Influenced by RISC-ideas, this VLSI standard cell shows some characteristics which are uncommon to most micro controllers. Its computing power reaches 80 million operations per second. Fabricated in 1.5pμCMOS the cell area is less than 6 mm
²
when completed with a typical memory size of 128 bytes RAM and 2 kbyte ROM.