On the generation of area-time optimal testable adders

We present a performance driven generator for integer adders which has the following interesting feature: The generator is parametrized in the operands' bitlength n, the delay of the addition t/sub n/, and the fault model FM. FM may in particular be chosen as the classical stuck-at fault model, the cellular fault model or the robust path delay fault model. The output of the generator is a performance oriented conditional sum type adder, i.e., an area-minimal n-bit adder of the "conditional sum type" with delay /spl les/t/sub n/ (if it exists) together with a small complete test set with respect to the chosen fault model FM.<
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