Rule-based implementation of correct and efficient VLSI design rule checking

A theory and implementation for automatic and optimized compilation of VLSI design rule checking directives from graphically specified design rules are presented. In addition to a very comfortable user interface, this approach results in more efficient use of computer resources (a crucial asset when verifying large circuits), as exemplified with tests on design rules for a modern CMOS technology. A formal semantic description of the compilation process is given along with its systematic implementation in an expert system shell (NEXPERTObject). Thus an expert system with a sound formal basis is presented, as well as a practical evaluation of the feasibility of various programming paradigms in the language of an expert system shell.<
>