An SEU-Robust Configurable Logic Block for the Implementation of a Radiation-Tolerant FPGA

Within the perspective of the development of a radiation-tolerant SEU-robust reprogrammable FPGA, a user-configurable Logic Block was designed in a CMOS 0.25 mum technology. The configuration bits are stored in SEU-robust registers as well as the user data. The design takes care of minimizing the possibility of SET coming from the combinatorial logic. The Logic Block can implement any boolean expression of 4 variables, has a carry propagation infrastructure and a user-register. A set of Logic Blocks can be organized to form more complex logic functions. A test chip was fabricated and tested in a heavy-ion beam facility. Testing demonstrated the SEU robustness of the circuit up to an LET of 79.6 cm
²
MeV/mg and a small sensitivity at higher LETs