Design of a Double-Balanced Mixer using a 0.5-μm CMOS Technology

This paper describes the design of a CMOS double-balanced mixer for UHF applications. The mixer has been designed according technological design rules of a 0.5 mum, N-well CMOS process. Since this design uses 4-transistors per current-branch, operating under the strong inversion regimen, the minimum power supply required for correct operation is 4.8 V. In practice, the mixer's power supply will be taken from the RF energy with help of a voltage multiplier. From simulation results a power consumption of 16 mW was deduced. The mixer occupies an area of 92.4times91.5 mum
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