Time-to-Fail Extraction Model for the "Mixed-Mode" Reliability of High-Performance SiGe Bipolar Transistors

We present a mixed-mode reliability time-to-fail model for high-performance SiGe HBTs. We systematically extract model parameters for 10% current-gain (h
_FE
) degradation as function of stress parameters VM
_CB
and I
_E
over multiple orders of empirical drift data. The model also includes V
_BE
readout and geometry scalings