Using sinusoidal stimuli and Fourier analyses for memory IC testing

This paper explores the utilization of sinusoidal stimuli and Fourier analyses to test static RAM integrated circuits. Two different tests are investigated, a writing test with a sinusoidal stimulus on the DATA line and a reading test with a sinusoidal stimulus on an address line. Up to now, results show that numerous types of faults and defects can be detected and even identified. Sensitivity of the method with respect to parameter variations is also investigated.<
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