M/sup 3/: A high performance signal processor for RADAR applications

Real time radar computing requires high processing performances and fast and efficient I/O capabilities. These goals have been achieved by means of a new multiprocessor architecture based on the Motorola DSP 96002. This system was developed entirely in the FIAR laboratories, and now is a state-of-the-art unit in their avionic radar family. The authors describe a computer system developed specifically for RADAR signal processing called M/sup 3/. The function of the M/sup 3/ (Modular-Multiprocessor-Machine) is to process raw data coming from the coherent receiver, providing in output a list of the extracted targets. The M/sup 3/ is based on a multiple CPU architecture in which a master controls several slaves, committed only to computational functions. This machine offers an overall computational power of 300 MFLOPs, and a peak input data rate of 80 MBytes/sec. The modules are assembled using surface mounted CMOS devices, with a total power consumption of only 45 watts distributed on a 1450 cm/sup 2/ surface area.<
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