A BiCMOS dynamic divider circuit using a nonrestoring iterative architecture with carry look ahead for CPU VLSI

A race-free BiCMOS dynamic divider circuit using a non-restoring iterative architecture with carry look ahead is presented. Using the BiCMOS dynamic circuit, an 8-bit /spl divide/ 4-bit divider test circuit, based on 2-/spl mu/m BiCMOS technology, shows more than 4.5 times improvement in speed as compared to the CMOS divider circuit. The speed advantage of the BiCMOS dynamic divider circuit is even greater in a 64-bit divider, which is helpful for CPU VLSI.<>