Intertwined scheduling, module selection and allocation in time-and-area

Most high-level synthesis systems assume the existence of only one type of hardware module for each different type of operation. The system presented assumes the existence of multiple modules with identical functionality but different area and delay characteristics. The authors' results show that use of multiple modules allows area and time resources to be used more efficiently than would be the case for the use of a single module. Module selection must be performed for each operation. Scheduling and module selection decisions are made in a time-constrained and area-constrained fashion by pruning decisions which lead to designs that violate constraints. This system requires the user to specify only a total chip area constraint, allowing the system to fully explore tradeoffs between different allocations. Module selection, scheduling, and allocation are performed in an intertwined fashion.<>