A design methodology achieving fast development cycles for complex VLSI architectures

A design methodology that accomplishes fast design cycles for complex VLSI circuits and maintains a high level of integration and performance is presented. A configurable RISC microprocessor is the system core. Flexible and regular cells are used to automatically generate digital and analog hardware blocks. Together with this pick-and-place design methodology of the system architecture, a high-level development system leads to shortened design times.<
>