Heuristic techniques for the synthesis of complex functional units

A technique for the synthesis of complex multifunctional units is presented. Given a set of functions, the goal is to minimize the area cost of the functional unit that can execute these functions. The approach is based on heuristic algorithms which make use of bipartite matching combined with an efficient ordering strategy. The experimental results show that a good tradeoff between CPU time and the quality of the design has been obtained.<
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