A moment method for statistical analysis of high speed VLSI interconnects

Statistical analysis of VLSI interconnects is important in manufacturability-driven design of printed circuit boards (PCB) and multichip modules (MCM). Conventional Monte-Carlo method for such an analysis requires highly repetitive circuit simulations and is computationally intensive. This paper presents an alternative approach for statistical analysis. An analytical and explicit relationship between the statistics of the circuit output and that of circuit parameters is derived. It is based on statistical moment theory and does not require Monte-Carlo analysis. The approach is suitable for fast estimation of network statistical performances and is confirmed by examples for VLSI interconnect delay and ground noise analysis.<
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