A 130 /spl mu/W DAC for low-power video systems

A MOS transistor network, with reduced sensitivity to device mismatches, is used to implement a current-steering DAC for low-voltage applications. A prototype, implemented using a 1.2 /spl mu/m CMOS process, achieved 7-bit resolution at sampling rates of up to 10 MS/s while drawing only 65 /spl mu/A from a single 2-volt supply for a total power dissipation of only 130 /spl mu/W. An improved buffering amplifier is expected to increase the speed and to improve the resolution to 8-bits.<
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