Si-OEIC with a built-in PIN-photodiode

A Si-OEIC with a built-in PIN-photodiode has been developed by a new device structure. We have successfully fabricated an optical link receiver with a speed of 50 Mb/s. The new device structure consists of stacked epitaxial layers each with a buried diffusion region. The cutoff frequency of the photodiode thus realized is 300 MHz and the fall time is 1.6 ns. In this paper, the structure of this new device is presented along with its fabrication process, while the performance is analyzed using device simulation. It was found that the speed of the PIN-photodiode in the Si-OEIC is dominated by carrier transit time in the n/sup +/-buried region. Further investigation was made by device simulation on two advanced structures. The speed of response of PIN-photodiode will be improved to as fast as 1 ns by the current Si technology. By more advanced technology, 0.7 ns will be achieved for the fall time showing the ultimate characteristic of Si-OEIC.<
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