Three hot-carrier degradation mechanisms in deep-submicron PMOSFET's

Hot-carrier degradation is mainly caused by negative oxide-charge generation in the present-day PMOSFET's. We present experimental evidence showing that two more degradation mechanisms are important in the case of deep-submicron PMOSFET's. Firstly, the generation of interface states is significant in the case of sub-half-micron PMOSFET's. It even limits the lifetime of surface-channel transistors. Secondly, the generation of positive oxide charge by holes influences the characteristics. The latter process has been established unambiguously for the first time in PMOSFET's. We measured the bias dependence, the length dependence, and the time dependence separately for all three microscopic degradation mechanisms. We calculated the influence of these three mechanisms on the transconductance degradation. Summation of the three effects yields an excellent description of the experimentally determined time dependence of PMOSFET degradation for many bias conditions and various transistor geometries with either nitrided or conventional gate oxide.<
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