A high-resolution and high-stability charge-integration ADC for high-rate experiments

A charge-integration analog-to-digital converter (ADC) of 12-bit resolution was designed and built for the time-of-flight counters in the VENUS experiment at TRISTAN. The sample-and-hold process is done in the following way: outputs of a gated integrator were sampled before and after the integration gate timing; the voltage difference between the outputs was then recorded. By using this scheme, the output deviation caused by a short reset time is significantly reduced. The maximum deviation of the ADC counts is somewhat dependent on the duration for the discharge and the amount of integrated charge before the discharge. These effects were at most 3 counts and 2 counts, respectively. The integral nonlinearity was found to be within +or-1 LSB (least-significant bit) and did not depend on the time duration for the discharge. The temperature coefficient of the gain was typically 100 p.p.m./ degrees C. The temperature coefficient of the pedestal value was typically 0.15 counts/ degrees C.<
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