Effect of bipolar turn-on on the static current-voltage characteristics of scaled vertical power DMOSFET's

The parasitic bipolar transistor inherent in the power vertical Double Diffused MOSFET (DMOSFET) structure can have a significant impact on its performance and reliability. Selectively formed TiSi/sub 2/ films on source contacts were used to reduce the contact resistance to n/sup +/ source diffusion. These devices exhibit "kinks" in the output I-V characteristics. High contact resistance of TiSi/sub 2/ to moderately doped p-body diffusion causes high output conductance. Detailed two-dimensional numerical simulations are used to investigate the effect of the parasitic bipolar transistor on the static characteristics of scaled silicided DMOSFET's. The high contact resistance of TiSi/sub 2/-p-body interface leads to a floating potential and causes significant reduction in the MOS gate threshold voltage and results in a premature bipolar turn-on. It is shown that the parasitic bipolar turn-on places an important constraint on the scalability of the device into the submicron regime. A novel self-aligned DMOSFET structure with a shallow diffused p/sup +/ region is shown to eliminate this effect. Numerical simulations are shown to be in excellent agreement with the measured data at various temperatures.<
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