An analog front end for v.22bis modems

An analog front end for the 2400-b/s v.22bis modem has been implemented in a 3- mu m CMOS process. A high level of integration in the front end results in a low-cost, high-performance modem system. A mix of analog switched-capacitor and digital circuits is used throughout the chip. Some of the major functional blocks are a modulator, tone generator, band-split filters, programmable receive gain stage, 8-bit ADC (analog-to-digital converters), bandgap voltage reference, and special signal detectors. Features are included to support a number of lower-speed, split-band modem standards. The chip occupies 59000 mils/sup 2/ and dissipates 200 mW. System and circuit aspects of the design are discussed; measured performance of the IC and of the complete modem system are given.<
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