A two-step flash ADC for digital CMOS technology

This paper describes a current-mode two-step flash ADC suitable for integration on digital CMOS technology. The converter architecture comprises a low resolution flash employing high-speed current comparators, a thermometer-weighted current-mode DAC and a simple current subtractor and amplifier for generating the residue current. For a resolution of 7 bits and conversion frequency up to 50 MHz this converter was implemented on a 1.2 mu m CMOS digital technology yielding a silicon area of 0.29 mm/sup 2/.<
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