500-V n-channel insulated-gate bipolar transistor with a trench gate structure

An improved insulated-gate bipolar transistor (IGBT) with a trench gate structure that demonstrates a low forward voltage drop of 1.2 V at a forward conduction current density of 200 A/cm/sup 2/ is described. This device structure was fabricated using a self-aligned process that permits closely spaced vertical trench gates with a unit cell of 6 mu m. This allows for a fivefold increase of channel density and elimination of the parasitic JFET effect, thus reducing the forward voltage drop significantly. A static latching current density of 2700 A/cm/sup 2/ has been achieved in the UMOS-IGBT. Two-dimensional computer simulations of the UMOS-IGBT have been performed to identify the optimal cell design. This optimal design is predicted to increase the SOA current density by a factor of 2.9 over the state-of-the-art DMOS-IGBT.<
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