Bonding pad models for silicon VLSI technologies and their effects on the noise figure of RF NPNs

VLSI technologies such as BiCMOS and high speed ECL Bipolar are candidates for mixed mode applications which include RF receiver functions. In order for these silicon technologies to achieve low noise characteristics one needs to optimize both the active device and the signal path to the IC interface. Studies in the bonding pad parasitics indicate that these path losses can be Very significant. This paper models the bonding pads and presents measured vs. modeled noise figure data for several bonding pad configurations.<
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