Nondeterministic finite-state machines and sequential don't cares

Nondeterministic finite-state machines are being considered for extracting and representing sequential don't care conditions arising in high-level descriptions. This paper shows that they can also be used for capturing in full the sequential don't cares arising from embedding of a machine in a larger synchronous network in a uniform way. A novel algorithm for synthesizing a minimum-state deterministic finite-state machine from a nondeterministic one is developed here. The techniques developed in this paper are useful when incorporated in a synthesis system extracting sequential don't care information from high-level descriptions.<
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