Escher-a geometrical layout system for recursively defined circuits

An Escher circuit description is a hierarchical structure composed of cells, wires, connectors between wires, and pins that connect wires to cells. Cells may correspond to primitive circuit elements, or they may be defined in terms of lower level subcells. Unlike other geometrical layout systems, a subcell may be an instance of the cell being defined. When such a recursive cell definition is initiated, the recursion is unwound in a manner reminiscent of the procedure call copy rule in Algol-like programming languages. Cell specifications may have parameters that are used to control the unwinding of recursive cells and to provide for cell families with varying numbers of pins and other internal components. It is shown how the Escher layout system might be used with several nontrivial examples, including a parallel sorting network and a FFT (fast Fourier transform) implementation. The unwinding algorithm is also briefly described.<
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