A neural net arbitrator for large crossbar packet-switches

A Hopfield neural net architecture is proposed to control a crossbar switch in real time in order to effect the switching of packets at very high rates with maximum throughput. The performance of the net and the time needed for the analog computation are estimated from a numerical simulation of the real-time evolution of the neural states. An optimized VLSI implementation of an 8*8 neural net controller in 2- mu m CMOS technology is described.<
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