Higher density using diffusion patterned vias and fine-line printing

This paper discusses design guidelines, process steps, and test results from fabricating two 40-mm MCM-Cs using the latest thick film materials and printing techniques. The two line interface controller (LIC) modules have been designed with two large ASIC's (plus memory) and prototyped using thick film gold conductors with 3-mil line/space and 6-mil via criteria. The second prototype of the LIC module utilized silver conductors at 5-mil line and gap to further reduce cost. The second module design is using more bare die (field programmable gate arrays and memory) for a much higher interconnect density but is still using existing design guidelines. It is believed that 4-mil vias are achievable in production and will be developed for future designs requiring higher density. Diffusion patterning allows a 50% reduction (4-6 mil) in via size versus traditional printed vias (10-20 mil). In combination with fine-line printing, higher interconnect density is achievable than with conventional thick film processing. Fine-line printing improvements are a result of selecting state of the art meshes and emulsions in combination with special preparations, allowing unusually good track width reduction and excellent line definition.<
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