The impact of intermetal dielectric layer and high temperature bake test on the reliability of nonvolatile memory devices

This paper describes the effects of water-related species contained in intermetal dielectric layers on the reliability of nonvolatile memory devices. Charge loss of the cells and hot-carrier (HC) lifetime degradation of peripheral N-channel MOSFETs due to the high temperature bake test are accelerated by the water-related species in the intermetal dielectric layer. The relation between the charge loss and the HC-lifetime degradation and the mechanism involved are discussed. Appropriate dielectric structures to minimize such degradation have been proposed for nonvolatile memory devices with double-metal structure and scaled narrow first metal gaps.<
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