Prediction of dark currents in actual devices using new test structure

A test structure with four gate-controlled diodes (GCDs) and two junction diodes (with different dimensions) is designed in order to divide a dark current in actual devices into five components corresponding to device structure. Gate bias and temperature dependence reveal that the diffusion current from bulk is dominant in area regions. The G-R current is observed in the local oxidation of silicon (LOCOS) edge and gate edge. When applied to a CCD device, this method can predict the dark current in actual devices. It is found that the noise electron accumulated in one refresh cycle in dynamic RAMs (DRAMs) is increased according to DRAM generation, and that the main component originates from the source/field border region.<
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