Relocatable register sharing technique for multithreaded processor architectures

Multitasking improves processor utilization by allowing computation for one task to be overlapped with long latency operations involving other tasks. This requires substantial overhead to manage processes and interprocess communication, and reduces processor utilization. The paper presents a register sharing technique that supports efficient instruction stream interleaving of interacting tasks. This flexibility permits greater utilization of resources, allowing for more resident processes, and provides efficient interprocess communications in multitasking environments. Theoretical analysis and experiments using multitasking and distributed operating systems show that shared register multistreaming can sustain near optimal processor utilization for a variety of workloads.<
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