High linearity A/D conversion

A classification outline is presented for the errors found in an analog to digital converter (ADC). A comparative analysis is given for the errors due to: random noise, nonlinearities, and finite amplitude resolution (quantizing errors). An ADC implementation is then presented which substantially reduces the errors due to nonlinearities and virtually eliminates the quantizing errors. The result is an ADC with the capability to perform state of the art conversions over a wide range of sample rates, 10 MHz down to 1 KHz.<
>