Identification of soft-error sensitive junction in SRAM's using a single ion microprobe

Soft-error sensitive junctions have been identified in a memory cell of a 63 kbit SRAM. The technique for hitting a micron-size area with a single ion enables us to get a soft-error map in a memory cell. A dependence of the maps on the supply voltage to the memory has been investigated. The errors due to the upset of an n-MOSFET have been observed at higher supply voltage than for a p-MOSFET. This result suggests that the n-MOSFET's are more error-sensitive than the p-MOSFET's for the reason that the n-MOSFET's have a higher efficiency of charge collection and a larger "on" current.<
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