Estimating the effects of process technology improvements on microprocessor performance

A methodology is presented to estimate the effect of process technology improvements on microprocessor performance. Figures of merit are defined as the ratio of the transistor saturation current divided by the product of the logic voltage swing and the load capacitance. These are determined from a limited set of transistor parameters and layout design rules. Limiting values of the figure of merit are estimated for the cases where the load capacitance is comprised primarily of transistor gates and where the load capacitance is wiring dominated. An intermediate value is then selected based on the design methodology followed historically by the product design group. Good agreement has been found between this simplified technique and more detailed simulations of actual designs.<
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