A scale-space chip

Scale-space is a representation for detecting and organising intensity changes that occur at various scales in an image. A single-chip VLSI design is proposed for scale-space computation in one and two dimensions. The architecture of the chip is based on an algorithm that can provide speeds that are an order of magnitude higher than the speeds obtainable from the other systems proposed in the literature. The design uses the principles of modularity, expandability and parallelism, and fully utilizes the three properties of the Gaussian: symmetry, separability, and scaling. The proposed algorithm and the hardware architecture use a very high degree of pipelining and parallelism. The chip can be implemented in either nMOS or CMOS technology.<>